Work in progress | MUDA -> LLVM backend

I've started to implement LLVM IR backend for MUDA.

http://lucille.svn.sourceforge.net/viewvc/lucille/angelina/haskellmuda/CodeGenLLVM.hs?view=markup


MUDA's LLVM IR backend is still work in progress.
First, I've won success on simple case.

Here's MUDA input code,

// input.mu
vec
func( vec a, vec b ) {

 return a + b;

}

MUDA's current LLVM backend emits,

$ mudah --llvm input.mu > tmp.ll
$ cat tmp.ll

;;
;; The following code was generated by MUDA compiler
;;
target datalayout = "i32:128:128-f32:128:128"

define <4xfloat> @func (<4xfloat> %a, <4xfloat> %b)
{
  %a.addr = alloca <4xfloat> ;
  store <4xfloat> %a, <4xfloat>* %a.addr ;
  %b.addr = alloca <4xfloat> ;
  store <4xfloat> %b, <4xfloat>* %b.addr ;
  %t_vec1 = load <4xfloat>* %a.addr ;

  %t_vec2 = load <4xfloat>* %b.addr ;

  %t_vec3  =  add <4xfloat> %t_vec1 ,  %t_vec2   ;
  ret <4xfloat> %t_vec3 ;
}

The LLVM code generated in MUDA -> LLVM IR backend is straightforward and somewhat redundant.

Try to get native code with optimization by LLVM midend and backend,

$ llvm-as tmp.ll -f
$ opt -std-compile-opts -f tmp.bc -o tmp.opt.bc
$ llc tmp.opt.bc -f
$ cat tmp.opt.s

 .text
 .align 4,0x90
 .globl _func
_func:
 addps %xmm1, %xmm0
 ret

 .subsections_via_symbols

This is exactly what I want to get in x86 assembler(Just one addps instruction),
LLVM(and it's x86 backend) rocks!